1. Field of the Invention
Embodiments of the invention relate to the field of microprocessors, and more specifically, to floating-point units.
2. Description of Related Art
Use of floating-point (FP) operations is becoming increasingly prevalent in many areas of computations such as three-dimensional (3-D) computer graphics, image processing, digital signal processing, weather predictions, space explorations, seismic processing, and numerical analysis. Specially designed floating-point units have been developed to enhance FP computational power in computer systems. Many of FP applications involve vector processing. Floating-point processors (FPP's) designed for vector processing typically employ a pipeline architecture.
Existing techniques for pipelined FPP's typically use a single deep pipeline for vector processing. While this approach may be simple and sufficient for some applications, it has a number of drawbacks for highly intensive vector processing. It is difficult to modify the architecture when the problem size changes, either increasing or decreasing. There may also be deadlocks, leading to low pipeline utilization. Simple instructions may have the same latency as complex instructions, leading to inefficient use of pipelines. Other disadvantages may include low throughput, throughput dependency on vector population, etc.